1. Field of the Invention
This invention relates generally to semiconductor circuit devices and methods for making such devices. More particularly, this invention relates to semiconductor memory cells that incorporate a chalcogenide element and to methods for making chalcogenide memory cells.
2. Description of the Related Art
A diode array is a well known memory system used in semiconductor memory devices. The individual diodes in a given array are typically addressed via digit and word lines. In previous diode array memory systems, the individual memory cells were limited to just two memory or logic states: high or low. However, the number of possible logic states for a given memory cell may be increased by connecting a programmable resistor in series with the selected diode. By selectively altering the resistance of the progammable resistor, the diode may be changed to different logic states that correspond to the changed resistance levels. The number of permissible logic states in such systems is limited generally only by the number of different resistance levels that may be reliably set in the programmable resistor.
One possibility for such a programmable resistor is a chalcogenide element. By applying an external stimulus to the chalcogenide element, the internal structure of the chalcogenide material may be modified. The structural modification results in a new resistance level for the chalcogenide material. The chalcogenide material is ovonic in that the observable structural/resistance change exhibited is a variation of the Ovshinsky Effect, and is a function of the current which is applied to the chalcogenide element through the diode.
In the formation of a typical chalcogenide element, a layer of nitride, such as silicon nitride, is disposed over a lower electrode of carbon or TiSi.sub.x. A small pore is formed in the nitride layer, exposing a small area of the lower electrode. A layer of chalcogenide material is deposited on the nitride layer, filling the pore. A layer of carbon is deposited over the chalcogenide layer to form an upper electrode. A TiN layer is disposed over the upper electrode. The chalcogenide layer, upper carbon layer, and TiN layer form a stack that is masked and etched to remove the stack constituents, except in the vicinity of the pore. A passivation layer is placed over the stack and etched to form a contact hole leading to the TiN layer. Finally, a metallization step is performed.
Present techniques for forming the chalcogenide element in a diode array usually involve four separate masking steps: small pore formation, chalcogenide element stack formation, contact layer, and metallization.
There are several disadvantages associated with the present technique for incorporating a chalcogenide element. To begin with, there is an inherent tendency for the chalcogenide stack to dislodge from the nitride layer, causing electrical failure. This lifting problem is due to the rather poor adherence to silicon nitride exhibited by many chalcogenide materials. Second, there are certain difficulties associated with the stack etch step. Due to their physical and chemical nature, the etching of many chalcogenide materials is presently a process that is difficult to control. Finally, the sheer number of masking steps required make the process relatively uneconomical.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the foregoing disadvantages.